The fabrication of various solid state devices requires the use of planar substrates, or semiconductor wafers, on which integrated circuits are fabricated. The final number, or yield, of functional integrated circuits on a wafer at the end of the IC fabrication process is of utmost importance to semiconductor manufacturers, and increasing the yield of circuits on the wafer is the main goal of semiconductor fabrication. After packaging, the circuits on the wafers are tested, wherein non-functional dies are marked using an inking process and the functional dies on the wafer are separated and sold. IC fabricators increase the yield of dies on a wafer by exploiting economies of scale. Over 1000 dies may be formed on a single wafer which measures from six to twelve inches in diameter.
In the semiconductor production industry, various processing steps are used to fabricate integrated circuits on a semiconductor wafer. These steps include the deposition of layers of different materials including metallization layers, passivation layers and insulation layers on the wafer substrate, as well as photoresist stripping and sidewall passivation polymer layer removal. In modern memory devices, for example, multiple layers of metal conductors are required for providing a multi-layer metal interconnection structure in defining a circuit on the wafer. A current drive in the semiconductor device industry is to produce semiconductors having an increasingly large density of integrated circuits which are ever-decreasing in size. These goals are achieved by scaling down the size of the circuit features in both the lateral and vertical dimensions. Vertical downscaling requires that the thickness of conductive and insulative films on the wafer be reduced by a degree which corresponds to shrinkage of the circuit features in the lateral dimension. Ultrathin device features will become increasingly essential for the fabrication of semiconductor integrated circuits in the burgeoning small/fast device technology.
Chemical vapor deposition (CVD) processes are widely used to form layers of materials on a semiconductor wafer. CVD processes include thermal deposition processes, in which a gas is reacted with the heated surface of a semiconductor wafer substrate, as well as plasma-enhanced CVD processes, in which a gas is subjected to electromagnetic energy in order to transform the gas into a more reactive plasma. Forming a plasma can lower the temperature required to deposit a layer on the wafer substrate, to increase the rate of layer deposition, or both. Other CVD processes include APCVD (atmospheric pressure chemical vapor deposition), and LPCVD (low pressure chemical vapor deposition). While APCVD systems have high equipment throughput, good uniformity and the capability to process large-diameter wafers, APCVD systems consume large quantities of process gas and often exhibit poor step coverage. Currently, LPCVD is used more often than APCVD because of its lower cost, higher production throughput and superior film properties. LPCVD is commonly used to deposit nitride, TEOS oxide and polysilicon films on wafer surfaces for front-end-of-line (FEOL) processes.
A typical conventional vertical LPCVD furnace is generally indicated by reference numeral 10 in FIG. 1 and includes a base 12 on which is removably mounted a quartz tube 14. The interior of the quartz tube 14 defines a reaction chamber 16 for processing of as many as 150 substrates 29 held by a wafer boat 24 that is supported on the base 12 and contained in the reaction chamber 16. The wafer boat 24 may be a SiC (silicon carbide) wafer boat and, as shown in FIG. 2, typically includes a base plate 25 and a top plate 26 which are spanned by multiple vertical support rods 27. The substrates 29 are supported in vertically-spaced relationship by slots (not shown) in the support rods 27.
A gas inlet tube 18 may extend downwardly through the quartz tube 14 into the reaction chamber 16, and a central gas inlet opening 20 may be provided in the top center of the quartz tube 14, for distributing reaction gases into the reaction chamber 16. A gas outlet 22 is provided typically in the base 12 for distributing exhaust gases from the reaction chamber 16. The gas outlet 22 may be located on the opposite side of the wafer boat 24 with respect to the gas inlet tube 18 to facilitate a more uniform flow of the reaction gases throughout the reaction chamber 16. Multiple circular dummy plates 31 may be provided in the bottom portion of the wafer boat 24 to further promote a uniform flow of the reaction gases 32, particularly in the bottom portion of the reaction chamber 16 which is the closest to the gas outlet 22, as shown in FIG. 3.
During LPCVD processes carried out in the conventional furnace 10, as many as 150 substrates 29 are processed in batches in order to maintain high wafer throughput. The substrates 29 in the upper sites (designated by the letter “U” in FIG. 2) and the substrates 29 in the center sites (designated by the letter “C” in FIG. 2) of the wafer boat 24 are substantially uniformly coated with deposition material, which forms films of uniform thickness, due to substantially uniform distribution of the reaction gases 32 along the surfaces of the substrates 29 in the upper sites “U” and the center sites “C”. However, at the lower sites “L”, the reaction gases 32 tend to flow in lesser volumes on the gas inlet tube 18 side than on the gas outlet 22 side of the reaction chamber 16. Consequently, due to the proximity of the substrates 29 in the lower sites “L” in the wafer boat 24 to the gas outlet 22, those substrates 29 tend to be coated with deposition material in various thicknesses along various regions on the surface of the substrate 29, as shown in FIG. 4, with the heaviest-coated region 34 of each substrate 29 located on the side of the wafer boat 24 closest to the gas inlet tube 18 and the lightest-coated region 36 on the substrate 29 located on the side of the wafer boat 24 closest to the gas outlet 22. A medium-coated region 35 is formed on the substrate 29 between the heaviest-coated region 34 and the lightest-coated region 36. Due to this disparity in film thickness among the various regions on the substrate 29, the L sites on the wafer boat 24 typically remain vacant during the LPCVD process. Consequently, each batch of substrates 29 typically contains only about 100 substrates, consisting of the substrates 29 in the U sites and the C sites, instead of the 150-wafer batch capacity. This reduces wafer throughput and processing efficiency.
It has been found that modifying the shape of the dummy plate to a truncated configuration provides a more uniform gas flow path and temperature profile within substrates located in the lower sites on the wafer boat. Consequently, the thickness uniformity of chemical vapor material deposited among the entire surface of the substrates in the lower sites of the wafer boat is substantially enhanced. Thickness uniformity on the wafers in the L-sites of the wafer boat have been improved from 4.2%, in the case of LPCVD processes which utilize the circular dummy plates, to 1.8%, in the case of LPCVD processes which utilize the truncated dummy plates of the present invention. CPK values for the U/C/L sites was improved from 1.9 to 3.3.
Accordingly, an object of the present invention is to provide a new and improved dummy plate for processing of substrates.
Another object of the present invention is to provide a new and improved dummy plate which facilitates enhanced thickness uniformity in film thickness among all regions on a substrate during CVD processes.
Still another object of the present invention is to provide a new and improved dummy plate which increases substrate throughput during semiconductor processing.
Yet another object of the present invention is to provide a new and improved dummy plate which promotes uniformity in process gas distribution among all regions on a substrate positioned in relatively close proximity to an exhaust gas outlet in a semiconductor processing furnace or chamber.
A still further object of the present invention is to provide a dummy plate which has a truncated configuration for the uniform distribution of process gases in a LPCVD chamber.
Yet another object of the present invention is to provide a method of promoting a substantially uniform flow of process gases along all regions on the surface of a substrate to facilitate formation of a film having a substantially uniform thickness among the regions on the substrate.
A still further object of the present invention is to provide a truncated dummy plate which is capable of increasing the batch size or number of substrates in a semiconductor fabrication process.